The University of Kaiserslautern is one of the leading medium sized technical universities in Germany with approximately 14.000 students and about 170 professors with a very strong emphasis on ICT. The Microelectronic Systems Design Research Group headed by Prof. Norbert Wehn is part of the department of Electrical and Computer Engineering. Research focus is on embedded systems design, especially application driven design methodologies and efficient hardware architectures. Research topics are mobile communication systems (MIMO systems, LTE, channel codes), virtual hardware platforms, 3D integration, heterogeneous platforms for HPC applications, reliability and energy efficiency in embedded systems. The research group is strongly involved in many DFG and BMBF projects and has a large record of successful industry projects. Two start-ups spinout of this research group.
The research activities of the group in OPRECOMP are carried out to cover following areas: main memories based on DRAMs and ReRAMs, 3D-integration, modelling and design space exploration, emerging memory technologies, memory controller and interfaces in close collaboration with CEA and the other project members.
Contribution to OPRECOMP
The research activities of the Microelectronic Systems Design Research Group in OPRECOMP are carried out to cover following areas: main memories based on DRAMs and ReRAMs, 3D-integration, modelling and design space exploration, emerging memory technologies, memory controller and interfaces in close collaboration with ETHZ/IBM and the other project members.
The group from Kaiserslautern will be responsible for exploring and developing memory subsystems with approximate storage support that will be used throughout the project and will be leading Work Package 3.
Prof. Norbert Wehn
He holds the chair for Microelectronic Systems Design in the department of Electrical Engineering and Information Technology at the University of Kaiserslautern. He received the Diploma and PhD from TH Darmstadt in 1984 and 1989 respectively. He held several research and management positions at Siemens AG/Munich before he was appointed full professor at University of Kaiserslautern in 1997. He has more than 250 publications in various fields of microelectronic system design and holds several patents. He is Vice-President of the University Kaiserslautern, associate editor of various journals and member of several scientific advisory boards. In 2003 he served as program chair for DATE 2003 and as general chair for DATE 2005 respectively. In 2014 he was general Co-Chair of FPL 2015. His special research interests are VLSI-architectures for mobile communication, forward error correction techniques, low-power techniques, advanced SoC architectures, 3D integration, reliability issues in SoC and hardware accelerators for financial mathematics and big data applications.
Dr. Christian Weis
He received the Ph.D. degree in electrical engineering from the University of Kaiserslautern, Kaiserslautern, Germany, in 2014.
From 1996 to 1998, he was with Mitsubishi Semiconductor Europe, Germany, where he was engaged in the development of microcontrollers. From 1998 to 2009, he was with Siemens Semiconductor, Infineon Technologies AG and Qimonda AG, Munich, Germany, in DRAM design. During this time frame, he was involved in DRAM design for graphics and commodity DRAM products. In 2006, he was a Design Team Leader for the 1Gb DDR3 DRAM, the first DDR3 volume product at Infineon/Qimonda. Since 2009, he has been with the Microelectronic Systems Design Research Group, University of Kaiserslautern, Germany. He holds more than 20 patents related to DRAMs and DRAM design. He has published more than 30 papers in international peer-reviewed conferences and journals in the fields of 3D-DRAM and implementation of microelectronic systems. He has collaborated with several international research institutes (e.g. CEA, EPFL, University of Bologna, TU Delft, TU Eindhoven). His current research interests include 3D integrated DRAMs, DRAM controller design, and heterogeneous memories and MPSoCs.